US 12,340,747 B2
Array substrate and display apparatus
Ziyang Yu, Beijing (CN); Haigang Qing, Beijing (CN); Jingwen Zhang, Beijing (CN); Gukhwan Song, Beijing (CN); and Zhiliang Jiang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 18/579,420
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Feb. 28, 2023, PCT No. PCT/CN2023/078713
§ 371(c)(1), (2) Date Jan. 15, 2024,
PCT Pub. No. WO2024/178606, PCT Pub. Date Sep. 6, 2024.
Prior Publication US 2025/0046244 A1, Feb. 6, 2025
Int. Cl. G09G 3/3233 (2016.01); G09G 3/20 (2006.01); H04M 1/02 (2006.01); H04N 23/57 (2023.01); H10K 59/121 (2023.01); H10K 59/122 (2023.01); H10K 59/126 (2023.01); H10K 59/131 (2023.01); H10K 59/65 (2023.01)
CPC G09G 3/3233 (2013.01) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/122 (2023.02); H10K 59/131 (2023.02); H10K 59/65 (2023.02); G09G 3/2074 (2013.01); G09G 2300/0809 (2013.01); G09G 2300/0819 (2013.01); G09G 2310/08 (2013.01); H04M 1/0264 (2013.01); H04N 23/57 (2023.01); H10K 59/121 (2023.02); H10K 59/126 (2023.02)] 19 Claims
OG exemplary drawing
 
1. An array substrate, comprising a plurality of first subpixels in a first region and a plurality of second subpixels in a second region;
wherein the plurality of first subpixels comprise a plurality of first pixel driving circuits, the plurality of second subpixels comprise a plurality of second pixel driving circuits;
a respective first pixel driving circuit of the plurality of first pixel driving circuits comprises a smaller number of transistors than a respective second pixel driving circuit of the plurality of second pixel driving circuits; and
the first region has a light transmittance higher than the second region, and a subpixel density same as the second region;
wherein a respective data line extending continuously through the first region and the second region has different shapes in the first region and the second region; and
an orthographic projection of the respective data line on a base substrate at least partially overlap with an orthographic projection of active layers of driving transistors in a column of pixel driving circuits on the base substrate.