US 12,340,302 B2
Method and system for microarchitecture-aware program sampling
Yuanwei Fang, Sunnyvale, CA (US); Minghai Qin, Fremont, CA (US); and Yen-kuang Chen, Palo Alto, CA (US)
Assigned to ALIBABA GROUP HOLDING LIMITED, George Town (KY)
Filed by ALIBABA GROUP HOLDING LIMITED, Grand Cayman (KY)
Filed on Jan. 5, 2021, as Appl. No. 17/141,895.
Prior Publication US 2022/0215241 A1, Jul. 7, 2022
Int. Cl. G06N 3/08 (2023.01)
CPC G06N 3/08 (2013.01) 12 Claims
OG exemplary drawing
 
1. A computer-implemented method for sampling sections of a computer program to evaluate a hardware configuration to be deployed onto a plurality of variant microarchitectures, comprising:
obtaining a plurality of traces collected from executing the computer program on the plurality of variant microarchitectures, wherein the computer program comprises a benchmark program, and each of the plurality of traces includes a plurality of performance measurements associated with one or more labels corresponding to the plurality of variant microarchitectures;
training a machine learning (ML) model with multi-task learning based on the plurality of traces and the one or more labels as one or more training tasks, wherein the ML model comprises an embedding layer trained for embedding microarchitecture-specific features of the plurality of variant microarchitectures into vector representations of the plurality of traces;
compiling the computer program into intermediate code and executable code;
obtaining an execution trace by executing the executable code on a runtime system;
inputting the intermediate code into a graph neural network (GNN) to map the intermediate code into a graph;
generating a plurality of embedded vectors based on (1) the graph and (2) the execution trace, the plurality of embedded vectors corresponding to a plurality of sections of the computer program, wherein the computer program and the plurality of embedded vectors are microarchitecture-agnostic; and
updating, using the embedding layer of the trained ML model, the plurality of embedded vectors by injecting the microarchitecture-specific features of the runtime system into the plurality of embedded vectors as a basis for performing microarchitecture-aware program sampling on the computer program;
sampling the plurality of updated embedded vectors to identify a plurality of sections of the computer program that are corresponding to the plurality of variant microarchitectures; and
returning an indication of the plurality of sections of the computer program to evaluate the hardware configuration to be deployed onto the plurality of variant microarchitectures.