US 12,340,201 B2
Server and updating method for MAC address
Jing-Chin Huang, Taoyuan (TW); and Chih-Peng Chang, Taoyuan (TW)
Assigned to MITAC COMPUTING TECHNOLOGY CORPORATION, Taoyuan (TW)
Filed by MITAC COMPUTING TECHNOLOGY CORPORATION, Taoyuan (TW)
Filed on May 12, 2022, as Appl. No. 17/743,152.
Claims priority of application No. 110117949 (TW), filed on May 18, 2021.
Prior Publication US 2022/0374223 A1, Nov. 24, 2022
Int. Cl. G06F 8/65 (2018.01); G06F 9/4401 (2018.01); H04L 61/50 (2022.01); H04L 101/622 (2022.01)
CPC G06F 8/65 (2013.01) [G06F 9/4401 (2013.01); H04L 61/50 (2022.05); H04L 2101/622 (2022.05)] 13 Claims
OG exemplary drawing
 
1. A server, comprising:
a network chipset, having a preset first media access control (MAC) address;
a first non-volatile memory, storing the first MAC address;
a second non-volatile memory, storing a first basic input/output system (BIOS) code data;
a central processing unit, coupled to the network chipset and the second non-volatile memory; and
a baseboard management controller, coupled to the central processing unit, the first non-volatile memory, and the second non-volatile memory, the baseboard management controller is configured to read the first non-volatile memory to obtain the first MAC address, and to store a second BIOS code data comprising the first MAC address to the second non-volatile memory, causing the first BIOS code data to be overwritten by the second BIOS code data, wherein
the first BIOS code data comprises a second MAC address, the baseboard management controller reads the first non-volatile memory and the second non-volatile memory to compare the first MAC address with the second MAC address before the baseboard management controller stores the second BIOS code data to the second non-volatile memory, and the first BIOS code data is overwritten by the second BIOS code data comprising the first MAC address when the comparison result is different;
the baseboard management controller compares, in a power-on self-test (POST) process of the server, the first MAC address with the second MAC address and updates the first BIOS code data with the second BIOS code data comprising the first MAC address in the POST process;
the central processing unit is in a power-off state before the baseboard management controller completes the comparison of the first MAC address with the second MAC address in the POST process; and
after the baseboard management controller completes the comparison of the first MAC address with the second MAC address in the POST process, the baseboard management controller activates the central processing unit, causing the server enter an SO state complying with an advanced configuration and power interface (ACPI) standard.