US 12,340,119 B2
Memory system and operating method of the memory system
Se Ho Lee, Icheon-si (KR); and Min Gu Kang, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Dec. 20, 2022, as Appl. No. 18/084,930.
Claims priority of application No. 10-2022-0054640 (KR), filed on May 3, 2022.
Prior Publication US 2023/0359393 A1, Nov. 9, 2023
Int. Cl. G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 13/16 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0607 (2013.01); G06F 3/0658 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a non-volatile memory device; and
a performance managing circuit configured to:
activate a plurality of sub-controllers according to a setting of a host device,
allocate memory regions respectively to the plurality of sub-controllers, wherein the memory regions are included in the non-volatile memory device, and
determine, according to maximum performance values and a size ratio of the memory regions, credit sets to be allocated respectively to the plurality of sub-controllers,
wherein each of the credit sets includes a sequential operation credit and a random operation credit.