US 12,339,700 B2
Transient current-mode signaling scheme for on-chip interconnect fabrics
Jiale Liang, San Jose, CA (US); Tezaswi Raja, San Jose, CA (US); Suhas Satheesh, Sunnyvale, CA (US); Shalimar Rasheed, San Jose, CA (US); Gaurav Ajwani, Union City, CA (US); Ram Kumar Ranjith Kumar, Brantford (CA); and Miloni Mehta, San Jose, CA (US)
Assigned to Nvidia Corp., Santa Clara, CA (US)
Filed by NVIDIA Corp., Santa Clara, CA (US)
Filed on Feb. 5, 2023, as Appl. No. 18/164,590.
Prior Publication US 2024/0264625 A1, Aug. 8, 2024
Int. Cl. G06F 1/08 (2006.01); H03K 5/01 (2006.01); H03K 5/00 (2006.01)
CPC G06F 1/08 (2013.01) [H03K 5/01 (2013.01); H03K 2005/00019 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A circuit comprising:
a transmission line to propagate a signal through a serially-arranged plurality of repeaters;
a control circuit to propagate control pulses to the repeaters, wherein a timing and duration of the control pulses is configured to operate the repeaters in current-mode signaling (CMS) mode during a state transition of the signal at the repeaters and to operate the repeaters in voltage-mode signaling (VMS) mode otherwise; and
the circuit configured such that propagation of the signal along the transmission line is initiated by a first clock signal and a duration and timing of the control pulses is determined by a second clock signal.