US 12,339,691 B2
Low drop-out regulator circuit, corresponding device and method
Antonino Conte, Tremestieri Etneo (IT); Marco Ruta, San Gregorio di Catania (IT); Francesco Tomaiuolo, Acireale (IT); Michelangelo Pisasale, Catania (IT); and Marion Helne Grimal, Catania (IT)
Assigned to STMICROELECTRONICS S.r.l., Agrate Brianza (IT)
Filed by STMICROELECTRONICS S.r.l., Agrate Brianza (IT)
Filed on Apr. 4, 2023, as Appl. No. 18/295,774.
Claims priority of application No. 102022000007505 (IT), filed on Apr. 14, 2022.
Prior Publication US 2023/0333583 A1, Oct. 19, 2023
Int. Cl. G05F 1/59 (2006.01); G05F 1/575 (2006.01)
CPC G05F 1/59 (2013.01) [G05F 1/575 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit, comprising:
an output node configured to apply an output voltage to a load;
an input comparator configured to:
compare a reference voltage with a first voltage that is a function of the output voltage; and
produce a comparison signal having a first logical value or a second logical value based on an outcome of comparing the reference voltage with the first voltage; and
driver circuitry coupled to the input comparator and configured to receive the comparison signal from the input comparator, the driver circuitry including:
first and second drivers coupled to the input comparator and configured to receive the comparison signal, each of the first and second drivers including:
at least one driver transistor having a conductive terminal coupled to the output node and a control terminal configured to receive a voltage-pumped replica of the comparison signal, wherein the replica of the comparison signal has a first respective logical value or a second respective second logical value based on the outcome of the comparing the reference voltage with the first voltage, wherein the least one driver transistor is conductive or non-conductive in response to the voltage-pumped replica of said comparison signal having the first respective logical value or the second respective logical value;
voltage boost capacitive circuitry configured to apply the voltage-pumped replica of the comparison signal to the control terminal of the at least one driver transistor; and
voltage refresh transistor circuitry coupled to the voltage boost capacitive circuitry and configured to transfer the voltage-pumped replica of the comparison signal to the voltage boost capacitive circuitry,
wherein the first and second drivers are controllably switchable between:
a first mode of operation during which the least one driver transistor is conductive or non-conductive in response to the voltage-pumped replica of the comparison signal having the first respective logical value or the second respective logical value and the voltage refresh transistor circuitry being deactivated, and
a second mode of operation during which the voltage refresh transistor circuitry is activated to transfer the voltage-pumped replica of the comparison signal to the voltage boost capacitive circuitry, and the least one driver transistor is non-conductive.