US 12,016,114 B2
Setting the impedance of signal traces of a circuit board using a reference trace
Manhtien V. Phan, Morgan Hill, CA (US); Mau-Lin Chou, Milpitas, CA (US); and Chih-Hao Lee, New Taipei (TW)
Assigned to Super Micro Computer, Inc., San Jose, CA (US)
Filed by SUPER MICRO COMPUTER, INC., San Jose, CA (US)
Filed on Mar. 9, 2023, as Appl. No. 18/119,711.
Application 18/119,711 is a division of application No. 17/480,696, filed on Sep. 21, 2021, granted, now 11,632,857.
Application 17/480,696 is a division of application No. 17/070,167, filed on Oct. 14, 2020, granted, now 11,166,367, issued on Nov. 2, 2021.
Application 17/070,167 is a continuation of application No. 16/750,686, filed on Jan. 23, 2020, granted, now 10,849,220, issued on Nov. 24, 2020.
Prior Publication US 2023/0217583 A1, Jul. 6, 2023
Int. Cl. H05K 1/02 (2006.01); H01L 23/528 (2006.01); H01L 23/66 (2006.01); H05K 1/14 (2006.01)
CPC H05K 1/0253 (2013.01) [H05K 1/0298 (2013.01); H05K 2201/093 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A circuit board comprising:
a dielectric layer;
a first contact finger and a second contact finger that are on an edge connector of the circuit board, the first and second contact fingers being on a first surface of the dielectric layer and configured to carry a differential signal;
a reference plane that is on a second surface of the dielectric layer; and
a reference trace that is within the dielectric layer, the reference trace being directly under and between the first and second contact fingers, the reference trace being configured to set a differential impedance of the first and second contact fingers,
wherein the reference plane, the reference trace, the first contact finger, and the second contact finger each comprises a metal.