US 12,015,429 B2
Hardware channel-parallel data compression/decompression
Ilia Ovsiannikov, Porter Ranch, CA (US); Ali Shafiee Ardestani, San Jose, CA (US); Lei Wang, Burlingame, CA (US); and Joseph H. Hassoun, Los Gatos, CA (US)
Assigned to SAMSUNG ELECTRONICS CO., LTD., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 19, 2022, as Appl. No. 17/969,671.
Application 17/969,671 is a continuation of application No. 16/842,662, filed on Apr. 7, 2020, granted, now 11,671,111.
Claims priority of provisional application 62/841,819, filed on May 1, 2019.
Claims priority of provisional application 62/835,496, filed on Apr. 17, 2019.
Prior Publication US 2023/0047025 A1, Feb. 16, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H03M 7/30 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); H03M 7/40 (2006.01); H04L 5/02 (2006.01)
CPC H03M 7/3066 (2013.01) [G06F 9/30018 (2013.01); G06F 9/30036 (2013.01); G06F 9/30145 (2013.01); G06F 9/3818 (2013.01); G06F 9/3851 (2013.01); H03M 7/40 (2013.01); H03M 7/6005 (2013.01); H03M 7/6011 (2013.01); H03M 7/6023 (2013.01); H04L 5/023 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device for multichannel data packing packer, the device comprising:
a plurality of two-input multiplexers arranged in 2N rows and N columns in which N is an integer greater than 1, wherein:
each input of a multiplexer in a first column receives a respective bit stream of 2N channels of bit streams,
each respective bit stream includes compressed pixel data ,
a first bit stream of the 2N channels of bit streams has a different bit-stream length than a second bit stream of the 2N channels of bit streams, and
multiplexers in a last column generate an output that includes channels of packed bit streams each having a same bit-stream length; and
a processor to perform image-based inference based on the output.