| CPC H03K 9/02 (2013.01) [H03K 7/02 (2013.01)] | 20 Claims |
|
1. A driver circuit, comprising:
a first circuit, comprising:
a first inverter circuit having a first input terminal and a first output terminal;
a first impedance element electrically coupled to the first output terminal;
a second inverter circuit having a second input terminal and a second output terminal; and
a second impedance element electrically coupled to the second output terminal and electrically coupled to the first impedance element at a first connection point; and
a second circuit, comprising:
a third inverter circuit having a third input terminal and a third output terminal;
a third impedance element electrically coupled to the third output terminal;
a fourth inverter circuit having a fourth input terminal and a fourth output terminal; and
a fourth impedance element electrically coupled to the fourth output terminal and electrically coupled to the third impedance element at a second connection point,
wherein a first input signal to the first input terminal, a second input signal to the second input terminal, a third input signal to the third input terminal, and a fourth input signal to the fourth input terminal are selected such that the first connection point has substantially a same voltage as the second connection point for encoding a value using the driver circuit.
|