| CPC H03K 3/017 (2013.01) [H03K 5/04 (2013.01); H03K 5/05 (2013.01); H03L 7/08 (2013.01)] | 20 Claims |
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1. A circuit, comprising:
a pulse width modulated signal generator that includes:
a timer circuit including a counter and a comparator, the timer circuit configured to:
during a switch-on duration, vary a first count value in response to a timer clock signal and generate a first trigger when the first count value reaches a first integer number, the first integer number indicative of the number of clock periods of the switch-on duration; and
during a switch-off duration, vary a second count value in response to the timer clock signal and generate a second trigger when the second count value reaches a second integer number, the second integer number indicative of the number of clock periods of the switch-off duration; and
the signal generator being configured to:
during the switch-on duration, determine whether a third integer number is smaller than n/2, where n is equal to a number of phase-shifted clock phases of the timer clock signal, and in response to determining the third integer number is smaller than n/2, increase the first count value for a single clock cycle of the timer clock signal by two.
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