| CPC H03F 1/3205 (2013.01) [H03F 3/193 (2013.01)] | 20 Claims |
|
1. An apparatus comprising:
a first bias transistor and a second bias transistor connected together to form a current mirror circuit configuration;
a first bias resistor connected to said first bias transistor and said second bias transistor, and said first bias resistor selected to set a quiescent current of said first and second bias transistors;
a radio frequency amplifier transistor connected to be powered from said current mirror circuit;
a first bypass capacitor connected to said first and second bias transistors, and selected to provide a bypass signal path to ground for radio frequency signals output from said amplifier transistor entering into said current mirror circuit;
a second bias resistor connected in series with said first bypass capacitor, and further selected to control the amount of said radio frequency signals travelling along said bypass signal path to ground;
a third bias resistor and a second bypass capacitor connected together and in series to form an injector feedback circuit, said injector feedback circuit connected in parallel to said first bias resistor, wherein said third bias resistor and said second bypass capacitor are each selected to control the amount of a sample of radio frequency signals output from said radio frequency amplifier transistor injected by said injector feedback circuit into said current mirror circuit; and
a fourth bias resistor connected from said current mirror circuit to the input of said radio frequency amplifier transistor, and selected to control bias input to said radio frequency amplifier transistor and further selected to control the amount of said sample of radio frequency signals injected into said current mirror circuit and subsequently returned into said radio frequency amplifier transistor to cancel distortion of said radio frequency amplifier transistor.
|