US 12,015,355 B2
Parallel NPC 3-level inverter without midpoint connection of the DC-links
Robert Turner, Hastings (NZ); Simon Walton, Napier (NZ); Sridhar Pulikanti, Napier (NZ); Arnoud Gerlof Van Der Wal, Napier (NZ); Ian Murray Porteous, Napier (NZ); and Nicholas James Elliott, Hastings (NZ)
Assigned to ABB SCHWEIZ AG, Baden (CH)
Appl. No. 17/905,057
Filed by ABB Schweiz AG, Baden (CH)
PCT Filed Feb. 27, 2020, PCT No. PCT/EP2020/055172
§ 371(c)(1), (2) Date Aug. 25, 2022,
PCT Pub. No. WO2021/170239, PCT Pub. Date Sep. 2, 2021.
Prior Publication US 2023/0208316 A1, Jun. 29, 2023
Int. Cl. H02M 7/493 (2007.01); H02M 1/00 (2007.01)
CPC H02M 7/493 (2013.01) [H02M 1/007 (2021.05)] 9 Claims
OG exemplary drawing
 
1. A parallel 3-level inverter comprising:
a plurality of parallel converters coupled in parallel between a common DC bus and a common AC output, wherein each of the plurality of parallel converters comprises a midpoint and the midpoints of the plurality of parallel converters are disconnected from each other; and
one or more controllers configured to:
determine a first average of upper DC bus half voltages of the plurality of parallel converters and a second average of lower DC bus half voltages of the plurality of parallel converters;
determine a modulation index for each of the plurality of parallel converters based on the first average, the second average, and an AC voltage reference for each of the plurality of parallel converters, such that the upper DC bus half voltages of each of the plurality of parallel converters are equal to one another and the lower DC bus half voltages of each of the plurality of parallel converters are equal to one another; and
perform a zero-sequence control based on the modulation index to cause the first average of the upper DC bus half voltages to be equal to the second average of the lower DC bus half voltages.