US 12,015,076 B2
HEMT and method of fabricating the same
Chih-Wei Chang, Tainan (TW); Yao-Hsien Chung, Kaohsiung (TW); Shih-Wei Su, Tainan (TW); Hao-Hsuan Chang, Kaohsiung (TW); Da-Jun Lin, Kaohsiung (TW); Ting-An Chien, Tainan (TW); and Bin-Siang Tsai, Changhua County (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Jan. 3, 2023, as Appl. No. 18/092,916.
Application 18/092,916 is a division of application No. 17/143,135, filed on Jan. 6, 2021, granted, now 11,688,790.
Claims priority of application No. 202011344582.7 (CN), filed on Nov. 26, 2020.
Prior Publication US 2023/0145175 A1, May 11, 2023
Int. Cl. H01L 29/66 (2006.01); H01L 29/20 (2006.01); H01L 29/423 (2006.01); H01L 29/778 (2006.01)
CPC H01L 29/66462 (2013.01) [H01L 29/2003 (2013.01); H01L 29/4236 (2013.01); H01L 29/42364 (2013.01); H01L 29/7786 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A fabricating method of a high electron mobility transistor (HEMT), comprising:
providing a first III-V compound layer;
forming a recess within the first III-V compound layer;
forming a dielectric layer filling up the recess;
forming a second III-V compound layer disposed on the first III-V compound layer and contacting the dielectric layer, wherein a composition of the first III-V compound layer is different from a composition of second III-V compound layer;
forming a trench in the first III-V compound layer and the second III-V compound layer, wherein the trench separates the dielectric layer into a first dielectric layer and a second dielectric layer, and the first dielectric layer and the second dielectric layer are disposed respectively at two sides of the trench;
forming a gate within the trench;
forming a source electrode, a drain electrode and a gate electrode, wherein the gate electrode is disposed directly on the gate, and the source electrode and the drain electrode are respectively disposed at two sides of the gate.