US 12,015,033 B2
Array substrate and method for manufacturing the same, display panel and display device
Wei Chen, Beijing (CN); Weixiong Chen, Beijing (CN); Xin Li, Beijing (CN); and Yong Song, Beijing (CN)
Assigned to BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Beijing (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/435,337
Filed by BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Beijing (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Dec. 30, 2020, PCT No. PCT/CN2020/141499
§ 371(c)(1), (2) Date Aug. 31, 2021,
PCT Pub. No. WO2021/190053, PCT Pub. Date Sep. 30, 2021.
Claims priority of application No. 202020399431.0 (CN), filed on Mar. 25, 2020.
Prior Publication US 2023/0178563 A1, Jun. 8, 2023
Int. Cl. H01L 27/12 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G09G 3/36 (2006.01); G02F 1/1333 (2006.01); G11C 19/28 (2006.01)
CPC H01L 27/124 (2013.01) [G02F 1/136286 (2013.01); G02F 1/1368 (2013.01); G09G 3/3622 (2013.01); H01L 27/1259 (2013.01); G02F 1/133331 (2021.01); G09G 2300/0408 (2013.01); G09G 2310/0281 (2013.01); G09G 2310/0283 (2013.01); G09G 2310/0286 (2013.01); G09G 2320/0233 (2013.01); G11C 19/28 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An array substrate having an active area and a non-active area adjacent to the active area; the array substrate comprising:
a base;
a first conductive layer disposed at a side of the base, a portion of the first conductive layer located in the non-active area including at least a first electrode of a first transistor and a first electrode of a second transistor, there being a distance between the first electrode of the first transistor and the first electrode of the second transistor, and the first transistor and the second transistor being at least a part of a shift register of a same stage in a gate driving circuit;
an insulating layer disposed at a side of the first conductive layer away from the base, and the insulating layer being provided with a first via hole exposing the first electrode of the first transistor and a second via hole exposing the first electrode of the second transistor; and
a second conductive layer disposed at a side of the insulating layer away from the first conductive layer, the second conductive layer including a first conductive connection portion, and the first conductive connection portion connecting the first electrode of the first transistor and the first electrode of the second transistor through the first via hole and the second via hole.