US 12,014,991 B2
Interconnect structure including graphene-metal barrier and method of manufacturing the same
Keunwook Shin, Suwon-si (KR); Kibum Kim, Seoul (KR); Hyunmi Kim, Seoul (KR); Hyeonjin Shin, Suwon-si (KR); and Sanghun Lee, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR); and SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION, Seoul (KR)
Filed on Sep. 23, 2022, as Appl. No. 17/951,474.
Application 17/951,474 is a continuation of application No. 16/861,891, filed on Apr. 29, 2020, granted, now 11,508,664.
Claims priority of application No. 10-2019-0050992 (KR), filed on Apr. 30, 2019; and application No. 10-2020-0051832 (KR), filed on Apr. 28, 2020.
Prior Publication US 2023/0012899 A1, Jan. 19, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 23/532 (2006.01); H01L 29/16 (2006.01)
CPC H01L 23/5386 (2013.01) [H01L 23/53204 (2013.01); H01L 23/5329 (2013.01); H01L 24/19 (2013.01); H01L 29/1606 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An interconnect structure comprising:
a substrate;
a graphene-metal barrier on the substrate, the graphene-metal barrier including a plurality of graphene layers and metal particles on a grain boundary of each of the plurality of graphene layers and between the plurality of graphene layers; and
a conductive layer on the graphene-metal barrier, wherein the metal particles are formed at a ratio of 1 atom % to 10 atom % with respect to carbon of the plurality of graphene layers.