	US 12,014,952 B2
	Lithography method to reduce spacing between interconnect wires in interconnect structure
Yi-Nien Su, Hsinchu (TW); and Yu-Yu Chen, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 22, 2023, as Appl. No. 18/339,264.
Application 18/339,264 is a continuation of application No. 17/126,246, filed on Dec. 18, 2020, granted, now 11,728,209.
Claims priority of provisional application 63/081,421, filed on Sep. 22, 2020.
Prior Publication US 2023/0335433 A1, Oct. 19, 2023
Int. Cl. H01L 21/768 (2006.01); H01L 21/033 (2006.01)

CPC H01L 21/76816 (2013.01) [H01L 21/0335 (2013.01); H01L 21/0337 (2013.01); H01L 21/0338 (2013.01); H01L 21/76877 (2013.01)]

20 Claims

1. A method comprising:

depositing a hard mask layer over an interconnect dielectric layer;

depositing a patterning layer over the hard mask layer;

forming a mask structure inset into the patterning layer and comprising a cut pattern;

performing an etch into the hard mask layer with the mask structure in place to pattern the hard mask layer with the cut pattern;

forming an additional mask structure overlying the patterned hard mask layer and comprising a line pattern, which comprises line-shaped openings elongated in parallel;

transferring the cut pattern and the line pattern concurrently to the interconnect dielectric layer from the patterned hard mask layer and the additional mask structure to form cut line-shaped openings elongated in parallel; and

forming conductive wires respectively in the cut line-shaped openings;

wherein the cut line-shaped openings correspond to the line-shaped openings and have cuts matching the cut pattern.

8. A method comprising:

depositing a hard mask layer over an interconnect dielectric layer;

patterning the hard mask layer into a patterned hard mask layer comprising a line-shaped segment elongated laterally in a first direction;

after the patterning, forming a mask structure comprising a pair of line-shaped segments elongated laterally in parallel in a second direction transverse to the first direction and overlapping with the line-shaped segment of the patterned hard mask layer;

removing portions of the interconnect dielectric layer according to the mask structure and the patterned hard mask layer to form a pair of openings elongated in the second direction and arranged in a line extending in the second direction; and

forming a pair of conductive wires bordering and respectively filling the pair of openings;

wherein the pair of openings are separated from each other by a portion of the interconnect dielectric layer, which underlies the line-shaped segment of the patterned hard mask layer at completion of the patterning.

14. A method comprising:

forming a patterned hard mask layer overlying an interconnect dielectric layer and comprising a line-shaped segment with a greatest dimension in a first direction;

forming a mask structure overlying the patterned hard mask layer and comprising a line-shaped opening, which overlies the line-shaped segment and has a greatest dimension in a second direction transverse to the first direction;

patterning the interconnect dielectric layer according to the mask structure and the patterned hard mask layer to form a cut line-shaped opening having a first opening segment and a second opening segment spaced from each other in the second direction; and

forming a first wire and a second wire respectively in the first opening segment and the second opening segment, wherein the first wire and the second wire have opposing sidewalls facing each other and extending in parallel, and further have rounded corners at edges of the opposing sidewalls when viewed top down.