US 12,014,784 B2
Evaluation of background leakage to select write voltage in memory devices
Nevil N. Gajera, Meridian, ID (US); Karthik Sarpatwari, Boise, ID (US); and Zhongyuan Lu, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 21, 2022, as Appl. No. 17/845,174.
Application 17/845,174 is a continuation of application No. 17/167,618, filed on Feb. 4, 2021, granted, now 11,404,130.
Prior Publication US 2022/0319616 A1, Oct. 6, 2022
Int. Cl. G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/30 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/3404 (2013.01) [G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3459 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a memory array including a memory cell;
at least one voltage driver configured to drive a first write voltage or a second write voltage on the memory cell, wherein the second write voltage has a greater magnitude than the first write voltage; and
at least one current sensor configured to sense a first current associated with background leakage in the memory array.