| CPC G06T 1/20 (2013.01) [G06F 13/4027 (2013.01); G06T 1/60 (2013.01)] | 8 Claims |
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1. A first graphics processor having a first command processor and a first geometry engine and connected to a first memory and a further graphics processor, the first graphics processor comprising:
a first bus fabric that delivers and receives data to and from the first memory connected thereto; and
a first interconnect that is connected to the first command processor and the first geometry engine and that delivers and receives data to and from a second command processor and a second geometry engine of the further graphics processor,
wherein, via a second interconnect, the first bus fabric delivers and receives data to and from a second bus fabric of the further graphics processor and is accessibly connected to a second memory connected to the further graphics processor, and
wherein each of the first interconnect and the second interconnect is an inter-chip interconnect that samples signals transferred via a signal line of the first graphics processor, and sends a data frame including information obtained by the sampling to the further graphics processor.
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