US 12,013,786 B2
Multi-port queueing cache and data processing system including the same
Heonsoo Lee, Suwon-si (KR); Byungchul Hong, Suwon-si (KR); Junseok Park, Suwon-si (KR); and Jaehun Chung, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 1, 2022, as Appl. No. 18/072,929.
Claims priority of application No. 10-2021-0185205 (KR), filed on Dec. 22, 2021; and application No. 10-2022-0062093 (KR), filed on May 20, 2022.
Prior Publication US 2023/0195636 A1, Jun. 22, 2023
Int. Cl. G06F 12/0862 (2016.01); G06F 9/38 (2018.01); G06F 12/02 (2006.01); G06F 12/06 (2006.01)
CPC G06F 12/0862 (2013.01) [G06F 9/3816 (2013.01); G06F 12/0261 (2013.01); G06F 12/0646 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A multi-port queueing cache, comprising:
a plurality of first ports and a plurality of second ports;
a plurality of request handlers respectively coupled to the plurality of first ports, the plurality of request handlers being configured to receive a plurality of addresses through the plurality of first ports, and to output a plurality of data corresponding to the plurality of addresses through the plurality of first ports;
a cache storage coupled to the plurality of second ports, the cache storage including a plurality of cache lines configured to store the plurality of data, the cache storage being configured to output at least a portion of the plurality of addresses through the plurality of second ports, and to receive at least a portion of the plurality of data corresponding to the at least a portion of the plurality of addresses through the plurality of second ports;
a reserve interface configured to exchange at least one address and at least one reserved cache line number; and
a request interface configured to exchange the at least one reserved cache line number and at least one data,
wherein the reserve interface and the request interface are disposed between each of the plurality of request handlers and the cache storage.