US 12,013,445 B2
Step voltage identification for multiple inputs
Yanqiu Jia, Suzhou (CN); Dan Jin, Suzhou (CN); and Yu Wang, Suzhou (CN)
Assigned to Suzhou Littelfuse OVS Co., Ltd., Suzhou (CN)
Appl. No. 17/783,980
Filed by Suzhou Littelfuse OVS Co., Ltd., Suzhou (CN)
PCT Filed Dec. 26, 2019, PCT No. PCT/CN2019/128510
§ 371(c)(1), (2) Date Jun. 9, 2022,
PCT Pub. No. WO2021/128114, PCT Pub. Date Jul. 1, 2021.
Prior Publication US 2023/0009053 A1, Jan. 12, 2023
Int. Cl. G01R 31/74 (2020.01); G01R 31/00 (2006.01)
CPC G01R 31/74 (2020.01) [G01R 31/006 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system, comprising:
a first fuse electrically connected in series between a first node and to a first resistor;
a second fuse electrically connected in series between a second node and a second resistor, wherein the first and second fuses are in parallel connection to a same port of a multiplexer, and wherein the first resistor is positioned between the first fuse and the multiplexer; and
a controller communicably connected with the multiplexer, the controller operable to read a voltage level of the first and second nodes.