CPC B01D 17/02 (2013.01) [B01D 21/0087 (2013.01); B01D 21/2444 (2013.01); B03B 5/00 (2013.01); G01N 30/0005 (2013.01); B82Y 99/00 (2013.01); G01N 30/6095 (2013.01)] | 15 Claims |
1. A fluidic processor device including an input through-surface-via (TSV), a product TSV, a drain TSV, two sets of bussing channels, an inlet injection port channel, a product access port channel, a drain access port channel and a fastener, the fluidic processor device comprising:
a nanofluidic separator chip including a nanofluidic deterministic lateral displacement (nanoDLD) array;
a housing, for housing the nanofluidic separator chip, including:
a top plate disposed on a top side of the nanofluidic separator chip;
a bottom plate disposed on a back side of the nanofluidic separator chip; and
a first spacer and a second spacer disposed between the nanofluidic separator chip and the bottom plate;
a first chamber that stores a drain fluid which flows through the nanoDLD array via the drain TSV and that is:
geometrically aligned about a center axis of the first chamber with the drain TSV and the nanoDLD array; and
located between inner edges of the first spacer; and
a second chamber that stores an output product which flows through the product TSV and that is:
geometrically aligned about a center axis of the second chamber with the product TSV; and
positioned between inner edges of the second spacer.
|