US 11,681,611 B2
Reservation architecture for overcommitted memory
Omid Azizi, Redwood City, CA (US); Amin Firoozshahian, Mountain View, CA (US); Andreas Kleen, Portland, OR (US); Mahesh Madhav, Portland, OR (US); Mahesh Maddury, Santa Clara, CA (US); Chandan Egbert, San Jose, CA (US); and Eric Gouldey, Fort Collins, CO (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 11, 2020, as Appl. No. 17/119,679.
Application 17/119,679 is a continuation of application No. 15/868,819, filed on Jan. 11, 2018, granted, now 10,866,888.
Prior Publication US 2021/0240609 A1, Aug. 5, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/02 (2006.01); G06F 9/50 (2006.01); G06F 3/06 (2006.01)
CPC G06F 12/0246 (2013.01) [G06F 3/0604 (2013.01); G06F 3/065 (2013.01); G06F 3/0608 (2013.01); G06F 3/0641 (2013.01); G06F 9/5016 (2013.01); G06F 12/0292 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A system for computer memory management, the system comprising:
a memory device within an overcommitted memory system; and
a memory overcommitment circuitry to:
receive a signal to reserve data copied from a first block in the memory device to a second block in the memory device, the data associated with a critical system process; and
update a mapping table to revise a pointer to point to the second block and mark the second block as reserved to disable a memory reduction within the second block and to guarantee a physical data space, the memory reduction including at least one of a memory compression and a memory deduplication.