US 12,336,405 B2
Display apparatus and method of manufacturing display apparatus
Ji-Hyun Ka, Asan-si (KR); Seung-Kyu Lee, Asan-si (KR); Hwan-Soo Jang, Asan-si (KR); and Jin-Tae Jeong, Suwon-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on May 3, 2024, as Appl. No. 18/654,066.
Application 18/654,066 is a continuation of application No. 18/134,683, filed on Apr. 14, 2023, granted, now 12,004,397.
Application 18/134,683 is a continuation of application No. 17/090,493, filed on Nov. 5, 2020, granted, now 11,631,730, issued on Apr. 18, 2023.
Application 17/090,493 is a continuation of application No. 16/902,342, filed on Jun. 16, 2020, granted, now 10,854,705, issued on Dec. 1, 2020.
Application 16/902,342 is a continuation of application No. 16/390,196, filed on Apr. 22, 2019, granted, now 10,700,155, issued on Jun. 30, 2020.
Application 16/390,196 is a continuation of application No. 16/184,224, filed on Nov. 8, 2018, granted, now 10,297,655, issued on May 21, 2019.
Application 16/184,224 is a continuation of application No. 15/404,661, filed on Jan. 12, 2017, granted, now 10,134,826, issued on Nov. 20, 2018.
Claims priority of application No. 10-2016-0045087 (KR), filed on Apr. 12, 2016.
Prior Publication US 2024/0284739 A1, Aug. 22, 2024
Int. Cl. H10K 59/131 (2023.01); H10K 59/121 (2023.01); H10K 59/123 (2023.01); H10K 59/124 (2023.01); H10K 71/00 (2023.01); H10K 59/12 (2023.01)
CPC H10K 59/131 (2023.02) [H10K 59/1213 (2023.02); H10K 59/123 (2023.02); H10K 59/124 (2023.02); H10K 71/00 (2023.02); H10K 59/1201 (2023.02); H10K 59/121 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display apparatus comprising:
a substrate including a first area, a function-adding area, of which at least a portion is surrounded by the first area, and a detour area disposed between the first area and the function-adding area;
a plurality of pixel circuits disposed in the first area;
at least one scan line electrically connected to at least one of the pixel circuits and passing through the detour area, the scan line including first straight portions, which are disposed in the first area and extends in a first direction, and a first detour portion, which connects the first straight portions to each other and has a shape that curves or bends along the function-adding area;
at least one data line electrically connected to at least one of the pixel circuits and passing through the detour area, the data line including second straight portions, which are disposed in the first area and extends in a second direction crossing the first direction, and a second detour portion, which connects the second straight portions to each other and has a shape that curves or bends along the function-adding area and intersects with the first detour portion;
a first organic insulation layer disposed on the first detour portion and the second detour portion;
a first transparent conductive layer disposed on the first organic insulation layer;
a second organic insulation layer disposed on the first transparent conductive layer; and
a second transparent conductive layer disposed on the second organic insulation layer.