US 12,336,400 B2
Display panel, method of manufacturing the same and display device
Yipeng Chen, Beijing (CN); Lujiang Huangfu, Beijing (CN); and Libin Liu, Beijing (CN)
Assigned to BOE Technology Group Co., Ltd., Beijing (CN)
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
Filed on Feb. 9, 2023, as Appl. No. 18/107,991.
Application 18/107,991 is a continuation of application No. 17/762,692, previously published as PCT/CN2021/087366, filed on Apr. 15, 2021.
Claims priority of application No. 202010387363.0 (CN), filed on May 9, 2020.
Prior Publication US 2023/0225165 A1, Jul. 13, 2023
Int. Cl. H10K 59/00 (2023.01); H10K 59/121 (2023.01); H10K 59/126 (2023.01); H10K 59/131 (2023.01); H10K 59/12 (2023.01)
CPC H10K 59/131 (2023.02) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/126 (2023.02); H10K 59/1201 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A display panel, comprising: a substrate, a sub-pixel driving circuit film layer arranged on the substrate, a plurality of sub-pixel areas arranged in an array; a power signal line layer, a third auxiliary signal line layer and a first shielding layer, wherein
the third auxiliary signal line layer includes a third auxiliary signal line pattern located in each of the plurality of sub-pixel areas, at least part of the third auxiliary signal line pattern extends along a first direction;
the power signal line layer includes a power signal line pattern located in each of the plurality of sub-pixel areas, at least part of the power signal line pattern extends along a second direction;
the first direction intersects the second direction;
the first shielding layer includes a first shielding pattern located in each of the plurality of sub-pixel areas, at least part of the first shielding pattern extends along the second direction, and the first shielding pattern is coupled to the power signal line pattern;
the sub-pixel driving circuit film layer includes sub-pixel driving circuits corresponding to the plurality of sub-pixel areas in a one-to-one manner, and each sub-pixel driving circuit includes a storage capacitor; and
in a same sub-pixel area, the first shielding pattern and the third auxiliary signal line pattern form an integral structure, the integral structure is arranged in a same layer as a second electrode plate of the storage capacitor, the integral structure is a U-shaped structure, and the storage capacitor is located in the U-shaped structure.