US 12,336,300 B2
Semiconductor devices and methods of manufacturing semiconductor devices
Rouying Zhan, Chandler, AZ (US); and Yupeng Chen, San Jose, CA (US)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Apr. 20, 2022, as Appl. No. 17/659,993.
Prior Publication US 2023/0343777 A1, Oct. 26, 2023
Int. Cl. H10D 89/60 (2025.01)
CPC H10D 89/713 (2025.01) 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a region of semiconductor material comprising:
a top side;
a bottom side opposite to the top side;
a semiconductor substrate;
a first semiconductor region over the semiconductor substrate;
a buried doped region of a first conductivity type in the first semiconductor region; and
a second semiconductor region over the first semiconductor region and the buried doped region;
a first well region of the first conductivity type in the second semiconductor region and electrically coupled to the buried doped region;
a second well region of a second conductivity type opposite to the first conductivity type in the second semiconductor region and having a first peak dopant concentration;
a third well region of the second conductivity type in the second semiconductor region abutting edges of the second well region, wherein:
the third well region is interposed between the first well region and the second well region;
the third well region and the first well region are laterally spaced apart so that a portion of the second semiconductor region is interposed between the third well region and the first well region; and
the third well region has a second peak dopant concentration that is different than the first peak dopant concentration;
a doped anode region of the second conductivity type in the first well region;
a doped cathode region of the first conductivity type in the second well region; and
a doped region of the second conductivity type in the second well region.