US 12,336,293 B2
Semiconductor structure with selective bottom terminal contacting
Julien El Sabahy, Grenoble (FR); Larry Buffle, Grenoble (FR); Stéphane Bouvier, Cairon (FR); and Frédéric Voiron, Barraux (FR)
Assigned to MURATA MANUFACTURING CO., LTD., Nagaokakyo (JP)
Filed by Murata Manufacturing Co., Ltd., Nagaokakyo (JP)
Filed on Dec. 23, 2022, as Appl. No. 18/087,892.
Application 18/087,892 is a continuation of application No. PCT/IB2021/055489, filed on Jun. 22, 2021.
Claims priority of application No. 20305700 (EP), filed on Jun. 25, 2020.
Prior Publication US 2023/0125974 A1, Apr. 27, 2023
Int. Cl. H01L 27/01 (2006.01); H01L 21/70 (2006.01); H10D 1/00 (2025.01); H10D 1/47 (2025.01); H10D 1/68 (2025.01); H10D 86/85 (2025.01)
CPC H10D 86/85 (2025.01) [H01L 21/707 (2013.01); H10D 1/042 (2025.01); H10D 1/47 (2025.01); H10D 1/716 (2025.01)] 14 Claims
OG exemplary drawing
 
1. A method of fabricating an RC device, comprising:
forming a first metal layer above a substrate;
forming a conductive layer above the first metal layer;
forming a second metal layer above the conductive layer;
forming a first mask layer on top of the second metal layer, the first mask layer having an opening onto the second metal layer;
anodizing the second metal layer to form a porous structure within the second metal layer, the porous structure underlying the opening of the first mask layer onto the second metal layer and comprising a plurality of pores that extend substantially perpendicularly from a top surface of the porous structure toward the conductive layer;
forming a second mask layer over the porous structure, the second mask layer having an opening onto a second area of the porous structure;
etching the bottom ends of a select set of pores of the plurality of pores; and
forming a metal-insulator-metal (MIM) stack in the plurality of pores of the porous structure.