US 12,336,250 B2
Semiconductor device structure and method for forming the semiconductor device structure
Shao-Jyun Wu, Hsinchu (TW); Yung Feng Chang, Hsinchu (TW); Tung-Heng Hsieh, Hsinchu (TW); and Bao-Ru Young, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 17, 2022, as Appl. No. 17/746,409.
Prior Publication US 2023/0378318 A1, Nov. 23, 2023
Int. Cl. H10D 64/01 (2025.01); H01L 21/02 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01)
CPC H10D 64/017 (2025.01) [H01L 21/0259 (2013.01); H10D 30/031 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor device structure, comprising:
forming a fin structure with first semiconductor layers and second semiconductor layers alternating stacked over a substrate;
forming a cladding layer over the fin structure;
forming a fin isolation structure beside the cladding layer;
forming a capping layer over the fin isolation structure;
forming a dummy gate structure across the capping layer;
patterning the dummy gate structure;
patterning the capping layer by using the dummy gate structure as a mask layer; and
removing the dummy gate structure.