| CPC H10D 62/121 (2025.01) [H10D 30/797 (2025.01); H10D 62/834 (2025.01)] | 18 Claims |

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1. A semiconductor structure comprising:
a semiconductor substrate having a top surface;
a dielectric layer formed on the semiconductor substrate; and
one or more group IV semiconductor monocrystalline nanostructures, each having a first extremity and a second extremity defining an axis parallel to the top surface of the semiconductor substrate and separated therefrom by the dielectric layer having a non-zero distance, each nanostructure of the one or more group IV semiconductor monocrystalline nanostructures having a source structure epitaxially grown on the first extremity and a drain structure epitaxially grown on the second extremity,
wherein the dielectric layer extends laterally beyond the first extremity and the second extremity along the axis parallel to the top surface;
wherein the group IV semiconductor of the source and drain structures include Si1−xGex when the semiconductor monocrystalline nanostructure on which they are grown comprises Si1−yGey wherein x>y≥0; and
wherein the source and drain structures are made of a group IV semiconductor doped with Sb, and optionally Bi and one or more of As and P, thereby creating tensile strain in the group IV semiconductor monocrystalline nanostructure.
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