US 12,336,211 B2
Dielectric layer on semiconductor device and method of forming the same
Cheng-I Lin, Hsinchu (TW); Ming-Ho Lin, Taipei (TW); Chun-Heng Chen, Hsinchu (TW); and Yung-Cheng Lu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Aug. 4, 2021, as Appl. No. 17/393,584.
Claims priority of provisional application 63/193,866, filed on May 27, 2021.
Prior Publication US 2022/0384611 A1, Dec. 1, 2022
Int. Cl. H10D 30/68 (2025.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 30/0243 (2025.01) [H10D 30/62 (2025.01); H10D 84/0147 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor device, the method comprising:
forming a semiconductor fin and an isolation region adjacent the semiconductor fin;
forming a first layer on the semiconductor fin;
forming a mask on the first layer, the mask being thicker on a top of the semiconductor fin than along a sidewall of the semiconductor fin;
thinning the first layer along the sidewall of the semiconductor fin using the mask, the thinning the first layer removing portions of the mask;
forming a second layer on the semiconductor fin, the second layer covering remaining portions of the mask and remaining portions of the first layer;
forming a dummy gate layer on the semiconductor fin; and
patterning the dummy gate layer, wherein patterning the dummy gate layer exposes a top surface of the semiconductor fin.