US 12,336,182 B2
Semiconductor device having 3D stacked structure and method of manufacturing the same
Youngkwan Cha, Hwaseong-si (KR); Jaechul Park, Yongin-si (KR); and Sanghun Jeon, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR); and Korea Advanced Institute of Science and Technology, Daejeon (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR); and KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, Daejeon (KR)
Filed on Mar. 7, 2022, as Appl. No. 17/688,043.
Claims priority of application No. 10-2021-0030414 (KR), filed on Mar. 8, 2021.
Prior Publication US 2022/0285401 A1, Sep. 8, 2022
Int. Cl. H10B 51/20 (2023.01); H10B 51/10 (2023.01)
CPC H10B 51/20 (2023.02) [H10B 51/10 (2023.02)] 21 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a plurality of channel structures on the substrate and arranged in a three-dimensional array including channel structures arranged in a direction parallel to the substrate and channel structures arranged in a direction perpendicular to the substrate, and the plurality of channel structures each including a channel layer and a ferroelectric layer on the channel layer;
a plurality of gate electrodes extending in the direction parallel to the substrate and connected to the channel structures arranged in the direction parallel to the substrate; and
a plurality of source electrodes and drain electrodes extending in the direction perpendicular to the substrate and connected to the channel structures arranged in the direction perpendicular to the substrate,
wherein the ferroelectric layer includes fluorite-based materials or perovskite.