| CPC H10B 43/35 (2023.02) [H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/27 (2023.02)] | 20 Claims |

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1. A three-dimensional (3D) memory device, comprising:
a memory stack comprising a memory block, the memory block comprising memory array structures and a staircase structure in a first lateral direction, and fingers in a second lateral direction perpendicular to the first lateral direction, the fingers comprising a first finger and a second finger; and
a source-select-gate (SSG) cut structure extending through a portion of the memory stack and between the first finger and the second finger,
wherein the staircase structure comprises a first staircase connected to first memory cells in the first finger and a second staircase connected to second memory cells in the second finger.
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