| CPC H04W 56/001 (2013.01) [H04W 16/28 (2013.01); H04W 24/08 (2013.01)] | 26 Claims |
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1. An apparatus for wireless communication at a user equipment (UE), comprising:
one or more memories;
a transceiver; and
one or more processors coupled with the one or more memories and the transceiver, the one or more processors configured to:
receive, via the transceiver, from a network entity, control signaling that indicates a sweeping pattern for a plurality of synchronization signal blocks that are multiplexed across a time domain and a frequency domain, and that indicates a first plurality of time periods over which the sweeping pattern repeats, wherein the control signaling comprises an indication of a muting pattern that indicates to mute a first synchronization signal block of the plurality of synchronization signal blocks and to monitor for each repetition of the first synchronization signal block;
monitor, during a first time period of the first plurality of time periods, two or more synchronization signal blocks multiplexed across the time domain and the frequency domain in accordance with the sweeping pattern such that at least one synchronization signal block and at least another, different synchronization signal block overlap during a same time but use different frequency resources; and
transmit, via the transceiver, to the network entity, an indication of a synchronization signal block of the plurality of synchronization signal blocks based at least in part on the monitoring.
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