US 12,335,642 B2
Solid-state imaging device and electronic device
Tomohiko Shibata, Kanagawa (JP); and Kiyoshige Tsuji, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Filed on May 21, 2024, as Appl. No. 18/670,610.
Application 18/670,610 is a continuation of application No. 17/769,580, granted, now 12,028,629, previously published as PCT/JP2020/042499, filed on Nov. 13, 2020.
Claims priority of application No. 2019-218405 (JP), filed on Dec. 2, 2019.
Prior Publication US 2024/0348944 A1, Oct. 17, 2024
Int. Cl. H04N 25/621 (2023.01); H04N 23/20 (2023.01); H04N 25/709 (2023.01); H04N 25/771 (2023.01); H04N 25/78 (2023.01); H10F 39/00 (2025.01); H10F 39/18 (2025.01)
CPC H04N 25/621 (2023.01) [H04N 23/20 (2023.01); H04N 25/709 (2023.01); H04N 25/771 (2023.01); H04N 25/78 (2023.01); H10F 39/182 (2025.01); H10F 39/809 (2025.01); H10F 39/811 (2025.01)] 10 Claims
OG exemplary drawing
 
1. A light detecting device comprising:
a photoelectric conversion unit;
a first charge holding unit coupled to the photoelectric conversion unit;
a first transistor including a gate terminal, a first terminal and a second terminal;
a voltage control circuit coupled to the first transistor;
a second transistor including a gate terminal, a first terminal and a second terminal, the first charge holding unit being directly electrically connected to the photoelectric conversion unit, the second terminal of the first transistor and the first terminal of the second transistor;
a second charge holding unit coupled to the second transistor;
a third transistor coupled to the second charge holding unit;
a fourth transistor coupled to the second charge holding unit, and
a fifth transistor coupled to the fourth transistor,
wherein the first transistor is a P-type metal oxide semiconductor (MOS) transistor.