| CPC H04N 19/105 (2014.11) [H04N 19/132 (2014.11); H04N 19/159 (2014.11); H04N 19/176 (2014.11)] | 15 Claims |

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1. A video signal decoding device comprising a processor,
wherein the processor is configured to:
determine an intra prediction mode for prediction of a current block based on whether an upper boundary of the current block and an upper boundary of a coding tree block are adjacent or separated by a specific number of samples,
wherein the coding tree block is an upper level region of the current block,
reconstruct the current block based on the intra prediction mode,
wherein the intra prediction mode is included in a first intra prediction mode set or a second intra prediction mode set,
wherein the first intra prediction mode set a planar mode, a DC mode, and a plurality of angular modes,
wherein the second intra prediction mode set includes a part of intra prediction modes included in the first intra prediction mode set, and the second intra prediction mode set does not include the planar mode,
wherein the second intra prediction mode set includes angular modes determined based on an intra prediction mode corresponding to at least one of neighboring blocks of the current block.
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