US 12,335,071 B2
Decision feedback equalizer
Yao-Chia Liu, Hsinchu (TW)
Assigned to REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed by REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed on Jan. 22, 2024, as Appl. No. 18/418,392.
Claims priority of application No. 112103937 (TW), filed on Feb. 3, 2023.
Prior Publication US 2024/0267265 A1, Aug. 8, 2024
Int. Cl. H04L 25/03 (2006.01)
CPC H04L 25/03057 (2013.01) [H04L 25/03267 (2013.01); H04L 25/03885 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A decision feedback equalizer (DFE), comprising:
an analog adder configured to generate an analog input signal according to an analog received signal and an analog feedback signal;
a comparison device including:
N data comparator(s), wherein the N is a positive integer, and each of the N data comparator(s) includes:
a data comparison feedback-compensation circuit configured to output a data comparison feedback-compensation signal to a first group of node(s) according to M data comparison feedback-compensation bit(s) and a data comparison feedback-compensation current, wherein the M is a positive integer, and the data comparison feedback-compensation current is dependent upon a data comparison feedback coefficient;
a data comparison input-stage circuit configured to output a data comparison sampling signal to the first group of node(s) according to the analog input signal under control of a first clock;
a data comparison gain-stage circuit configured to output a data comparison amplified signal to a second group of node(s) according to signal(s) of the first group of node(s) under control of a second clock, wherein the second clock and the first clock have the same frequency but different phases; and
a data comparison storage circuit configured to output a data comparison result according to signal(s) of the second group of node(s);
a register coupled with the comparison device, and configured to temporarily store the data comparison result;
a decision feedback coefficient generator coupled with the register, and configured to determine the data comparison feedback coefficient and an analog-to-digital conversion feedback coefficient according to the data comparison result; and
a digital-to-analog converter coupled with the decision feedback coefficient generator and the register, and configured to convert the data comparison result into the analog feedback signal according to the analog-to-digital conversion feedback coefficient.