US 12,335,050 B2
Channel dropping and processing timing requirements for uplink channel collision with different priorities
Zhanping Yin, Vancouver, WA (US)
Assigned to SHARP KABUSHIKI KAISHA, Sakai (JP)
Appl. No. 17/798,494
Filed by SHARP KABUSHIKI KAISHA, Sakai (JP)
PCT Filed Feb. 3, 2021, PCT No. PCT/JP2021/003901
§ 371(c)(1), (2) Date Aug. 9, 2022,
PCT Pub. No. WO2021/161867, PCT Pub. Date Aug. 19, 2021.
Claims priority of provisional application 62/975,380, filed on Feb. 12, 2020.
Prior Publication US 2023/0104984 A1, Apr. 6, 2023
Int. Cl. H04L 1/1829 (2023.01); H04W 72/20 (2023.01); H04W 72/56 (2023.01)
CPC H04L 1/1854 (2013.01) [H04W 72/20 (2023.01); H04W 72/56 (2023.01)] 3 Claims
OG exemplary drawing
 
1. A user equipment (UE), comprising:
a processor configured to:
determine a dropping timeline for low priority channel dropping when a low priority channel collides with a high priority physical uplink control channel (PUCCH) carrying a hybrid automatic repeat request-acknowledgement (HARQ-ACK), and
determine a processing delay for the high priority PUCCH when the low priority channel collides with the high priority PUCCH; and
transmitting circuitry configured to transmit the high priority PUCCH carrying the HARQ-ACK based on the dropping timeline and the processing delay,
wherein, for a high priority physical downlink shared channel (PDSCH) scheduled by downlink control information (DCI), the low priority channel is dropped after a number of PDSCH processing time symbols (N1) and a number of dropping delay symbols (d1,1) after an end of a PDSCH transmission.