US 12,334,954 B1
Threshold-based min-sum algorithm to lower the error floors of quantized low-density parity-check decoders
Homayoon Hatami, San Diego, CA (US); David G. Mitchell, Las Cruces, NM (US); Daniel Costello, Clarendon Hills, IL (US); and Thomas Fuja, South Bend, IN (US)
Assigned to Arrowhead Center, Inc., Las Cruces, NM (US); and University of Notre Dame du Lac, South Bend, IN (US)
Filed by Arrowhead Center, Inc., Las Cruces, NM (US); and University of Notre Dame du Lac, South Bend, IN (US)
Filed on Mar. 21, 2024, as Appl. No. 18/612,919.
Application 18/612,919 is a continuation of application No. 17/733,924, filed on Apr. 29, 2022, granted, now 11,962,324.
Application 17/733,924 is a continuation of application No. 16/871,917, filed on May 11, 2020, abandoned.
Claims priority of provisional application 62/873,061, filed on Jul. 11, 2019.
This patent is subject to a terminal disclaimer.
Int. Cl. H03M 13/11 (2006.01); H03M 13/00 (2006.01); H03M 9/00 (2006.01)
CPC H03M 13/1125 (2013.01) [H03M 13/1128 (2013.01); H03M 13/616 (2013.01); H03M 9/00 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method for lowering an error floor of a low-density parity-check (“LDPC”) decoder chip, thereby improving bit-error-rate and/or frame-error-rate performance of the LDPC decoder chip, the method comprising:
for messages passed from a check node to a variable node, computing a check node log-likelihood ratio within the LDPC decoder chip by passing quantized messages from a first processing unit on the LDPC decoder chip to a second processing unit on the LDPC decoder chip, wherein a plurality of check nodes are connected to a variable node and wherein a variable node is connected to at least one of the plurality of check nodes, and wherein the connections are specified by a parity-check matrix of an LDPC code, wherein computing further comprises:
comparing a value associated with a set of variable node log-likelihood ratio magnitudes with a threshold, wherein the input variable node log-likelihood ratio magnitudes are connected to a check node;
based on the results of the comparison, determining whether to apply a reduction to a check node log-likelihood ratio magnitude or not to apply a reduction to the check node log-likelihood ratio magnitude;
applying a reduction to the check node log-likelihood ratio magnitude in instances when the determining step determines that a reduction should be applied; and
not applying a reduction to the check node log-likelihood ratio magnitude in instances when the determining step determines that a reduction should not be applied.