| CPC H03M 1/08 (2013.01) [H03M 1/002 (2013.01); H03M 1/10 (2013.01); H03M 1/1009 (2013.01); H03M 1/1023 (2013.01)] | 14 Claims |

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1. A time-interleaved analog to digital converter, comprising:
a plurality of capacitor array circuits configured to sequentially sample an input signal and generate a plurality of first residue signals according to a plurality of first quantization signals;
a flash analog to digital converter circuitry configured to sample the input signal and sequentially generate the plurality of first quantization signals;
a plurality of first transfer circuits configured to sequentially transfer the plurality of first residue signals from the plurality of capacitor array circuits according to a plurality of first control signals;
a converter circuitry configured to perform a noise shaping signal conversion according to a first signal in the plurality of first residue signals and a second signal in plurality of second residue signals, in order to generate a second quantization signal;
a plurality of second transfer circuits configured to sequentially transfer a plurality of second residue signals from the plurality of capacitor array circuits to the converter circuitry according to a plurality of second control signals, wherein the plurality of capacitor array circuits further generate the plurality of second residue signals in response to the noise shaping signal conversion; and
an encoder circuit configured to generate a digital output according to a second quantization signal and a corresponding signal of the plurality of first quantization signals.
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