US 12,334,939 B2
Phase-locked loop (PLL) with direct feedforward circuit
Debapriya Sahu, Bengaluru (IN); and Rittu Sachdev, Bengaluru (IN)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Aug. 18, 2023, as Appl. No. 18/452,196.
Application 18/452,196 is a continuation of application No. 17/865,808, filed on Jul. 15, 2022, granted, now 11,777,507.
Application 17/865,808 is a continuation of application No. 17/146,510, filed on Jan. 12, 2021, granted, now 11,418,201, issued on Aug. 16, 2022.
Application 17/146,510 is a continuation of application No. 16/219,067, filed on Dec. 13, 2018, granted, now 10,924,123, issued on Feb. 16, 2021.
Prior Publication US 2023/0396259 A1, Dec. 7, 2023
Int. Cl. H03L 7/093 (2006.01); H03L 7/083 (2006.01); H03L 7/095 (2006.01)
CPC H03L 7/093 (2013.01) [H03L 7/083 (2013.01); H03L 7/095 (2013.01)] 26 Claims
OG exemplary drawing
 
1. A device comprising:
a phase offset detector having a first clock input, a second clock input, and first and second outputs;
a charge pump having first and second inputs, and an output, wherein the first input of the charge pump is coupled to the first output of the phase offset detector, and wherein the second input of the charge pump is coupled to the second output of the phase offset detector;
a feedforward circuit external to the charge pump, the feedforward circuit having an input and an output, wherein the input of the feedforward circuit is directly coupled to the output of the phase offset detector;
an amplifier having a first input, a second input, and an output, wherein the first input of the amplifier is coupled to the output of the charge pump, and the second input of the amplifier is coupled to a reference voltage terminal; and
an oscillator having an input coupled to the output of the amplifier.