US 12,334,937 B2
Semiconductor integrated circuit, electronic device, and control method for semiconductor integrated circuit
Hideo Yamaji, Kanagawa (JP); Sho Ohashi, Kanagawa (JP); Yinta Lin, Kanagawa (JP); Riichi Nishino, Kanagawa (JP); and Yoshinori Takahashi, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 18/566,749
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Dec. 28, 2021, PCT No. PCT/JP2021/048854
§ 371(c)(1), (2) Date Dec. 4, 2023,
PCT Pub. No. WO2022/264462, PCT Pub. Date Dec. 22, 2022.
Claims priority of application No. 2021-099108 (JP), filed on Jun. 15, 2021.
Prior Publication US 2024/0259024 A1, Aug. 1, 2024
Int. Cl. H03L 7/081 (2006.01); H03L 7/089 (2006.01); H03L 7/091 (2006.01)
CPC H03L 7/081 (2013.01) [H03L 7/0891 (2013.01); H03L 7/091 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor integrated circuit comprising:
a phase comparator configured to compare between a phase of a reference clock signal that has been input and a phase of a feedback clock signal, and output a comparison result;
a charge pump configured to generate a control voltage for control of a frequency of the feedback clock signal on a basis of the comparison result;
a feedback unit configured to generate the feedback clock signal in accordance with the control voltage; and
a stop detection unit configured to detect whether or not the reference clock signal is stopped, and initialize the comparison result in a case where the reference clock signal is stopped.