US 12,334,925 B2
Pulse width control apparatus and method
Yi-An Lai, Taipei (TW); Chan-Hong Chern, Palo Alto, CA (US); and Cheng-Hsiang Hsieh, Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Aug. 8, 2023, as Appl. No. 18/366,991.
Application 18/366,991 is a continuation of application No. 17/836,046, filed on Jun. 9, 2022, granted, now 11,764,760.
Claims priority of provisional application 63/329,942, filed on Apr. 12, 2022.
Prior Publication US 2023/0396238 A1, Dec. 7, 2023
Int. Cl. H03K 3/017 (2006.01); H03K 3/012 (2006.01); H03K 19/20 (2006.01)
CPC H03K 3/017 (2013.01) [H03K 3/012 (2013.01); H03K 19/20 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a logic device configured to perform a logic operation to two of signals generated by an oscillator circuit, wherein the logic operation generates a pulse width modulation (PWM) signal having a duty cycle corresponding to the two signals and the logic device comprises:
first and second logic circuits configured to receive the two signals; and
a third logic circuit configured to output the PWM signal.