US 12,334,916 B2
Signal converting circuit and bias voltage generation circuit thereof
Chien-Tsu Yeh, Hsinchu (TW); Hsi-En Liu, Hsinchu (TW); and Yi-Chun Hsieh, Hsinchu (TW)
Assigned to Realtek Semiconductor Corporation, Hsinchu (TW)
Filed by Realtek Semiconductor Corporation, Hsinchu (TW)
Filed on Feb. 24, 2023, as Appl. No. 18/173,787.
Claims priority of application No. 111108668 (TW), filed on Mar. 9, 2022.
Prior Publication US 2023/0291398 A1, Sep. 14, 2023
Int. Cl. H03K 17/14 (2006.01); H03K 5/00 (2006.01); H03K 5/01 (2006.01)
CPC H03K 17/14 (2013.01) [H03K 5/01 (2013.01); H03K 2005/00286 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A signal converting circuit comprising:
a phase interpolator circuit configured to convert a plurality of input clock signals into an output clock signal according to a digital signal; and
a bias voltage generation circuit comprising a reference circuit, wherein the reference circuit is a replicated circuit of the phase interpolator circuit, and the bias voltage generation circuit is electrically coupled to the phase interpolator circuit, configured to generate a bias voltage according to reference information and configured to output the bias voltage to the phase interpolator circuit, so that the output clock signal has a predetermined phase corresponding to one of a plurality of bit configurations of the digital signal;
wherein the reference information is relevant to a change of the phase interpolator circuit due to a manufacture process variation, and the reference information is an equivalent resistance of the reference circuit due to the manufacture process variation.