| CPC H02M 7/5395 (2013.01) [H02M 1/08 (2013.01); H02P 27/08 (2013.01)] | 14 Claims |

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1. A control apparatus configured to control a gate circuit, the control apparatus comprising:
a gate signal generation circuit configured to generate a gate signal to switch a state of the gate circuit;
a transmitter configured to transmit the generated gate signal;
a receiver configured to receive the transmitted gate signal; and
an error processing circuit configured to process an error in the received gate signal and to output the gate signal to the gate circuit,
wherein:
a process delay by the error processing circuit is greater than a sampling period of the gate signal switching the state of the gate circuit, and is equal to or less than a time to retain the state of the gate circuit, and
a pulse width of the gate signal is larger than the time to retain the state of the gate circuit, and is a time equivalent to an integer multiple of the sampling period.
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