US 12,334,824 B2
Dynamically biasing a bulk node and a gate node of a transistor in a DC-DC voltage converter
Srikanth Govindarajulu, Austin, TX (US); Michael D. Mulligan, Austin, TX (US); and Hatem M. Osman, Austin, TX (US)
Assigned to Silicon Laboratories Inc., Austin, TX (US)
Filed by Silicon Laboratories Inc., Austin, TX (US)
Filed on May 31, 2022, as Appl. No. 17/828,994.
Prior Publication US 2023/0387801 A1, Nov. 30, 2023
Int. Cl. H02M 3/158 (2006.01); H02M 1/00 (2006.01); H02M 1/36 (2007.01)
CPC H02M 3/158 (2013.01) [H02M 1/0032 (2021.05); H02M 1/36 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for operating a DC-DC converter comprising:
generating an output voltage on an output node of the DC-DC converter based on an input voltage on an input node of the DC-DC converter using a transistor having a bulk terminal and a gate terminal, the output voltage being greater than the input voltage;
coupling the input node to the bulk terminal and the gate terminal in response to the output voltage being less than the input voltage; and
coupling the output node to the bulk terminal in response to the output voltage exceeding the input voltage.