US 12,334,817 B2
DC-DC converter circuit and corresponding method of operation
Alessandro Bertolini, Vermiglio (IT); Alessandro Gasparini, Cusano Milanino (IT); Paolo Melillo, Caltanissetta (IT); Salvatore Levantino, Milan (IT); and Massimo Ghioni, Monza (IT)
Assigned to STMicroelectronics S.r.l., Agrate Brianza (IT)
Filed by STMicroelectronics S.r.l., Agrate Brianza (IT)
Filed on Apr. 10, 2023, as Appl. No. 18/132,774.
Claims priority of application No. 102022000007685 (IT), filed on Apr. 15, 2022.
Prior Publication US 2023/0336078 A1, Oct. 19, 2023
Int. Cl. H02M 3/07 (2006.01); H02M 1/00 (2007.01); H02M 3/158 (2006.01)
CPC H02M 3/07 (2013.01) [H02M 1/0003 (2021.05); H02M 1/0095 (2021.05); H02M 1/0025 (2021.05); H02M 3/158 (2013.01)] 16 Claims
OG exemplary drawing
 
11. A method of operating a DC-DC converter circuit, comprising:
providing an input voltage to an input node of the DC-DC converter circuit;
producing a first clock signal having a frequency that is a function of an output voltage of the DC-DC converter circuit;
producing a second clock signal having a frequency that is a function of a reference voltage;
switching operation of a switching stage of the DC-DC converter circuit, as a function of said first clock signal and said second clock signal, between:
a first operating phase wherein a flying capacitor is connected between said input node and a switching node;
a second operating phase wherein said flying capacitor has one floating terminal and said switching node is connected to one of said input node and a ground node;
a third operating phase wherein said flying capacitor is connected between said switching node and said ground node; and
a fourth operating phase wherein said flying capacitor has said one floating terminal and said switching node is connected to one of said input node and said ground node;
sensing a voltage across said flying capacitor;
comparing said sensed voltage to a target voltage;
producing a balancing signal indicative of a difference between said sensed voltage and said target voltage;
varying a duty-cycle of at least one of said first clock signal and said second clock signal as a function of said balancing signal, so that:
when said balancing signal is indicative of said sensed voltage being lower than said target voltage, a duration of said first operating phase is increased, and
when said balancing signal is indicative of said sensed voltage being higher than said target voltage, a duration of said third operating phase is increased.