CPC H01L 24/80 (2013.01) [H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05686 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80234 (2013.01); H01L 2224/80379 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01)] | 20 Claims |
1. A semiconductor die, comprising:
a semiconductor substrate;
a dielectric layer over the semiconductor substrate;
a bond pad in the dielectric layer, the bond pad including an exposed top surface that is recessed with respect to a surface of the dielectric layer opposite to the semiconductor substrate; and
a region of piezoelectric material in the dielectric layer, wherein the region is located proximate to the bond pad to supply thermal energy to the bond pad in response to exposing the piezoelectric material to an externally-applied electric field.
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