US 12,334,460 B2
Semiconductor device and manufacturing method of semiconductor device
Takuya Nakamura, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Filed on Sep. 18, 2023, as Appl. No. 18/469,469.
Application 18/469,469 is a continuation of application No. 17/499,166, filed on Oct. 12, 2021, granted, now 11,784,147.
Application 17/499,166 is a continuation of application No. 16/765,332, granted, now 11,183,472, issued on Nov. 23, 2021, previously published as PCT/JP2018/039008, filed on Oct. 19, 2018.
Claims priority of application No. 2017-227414 (JP), filed on Nov. 28, 2017.
Prior Publication US 2024/0006355 A1, Jan. 4, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01); H10F 39/00 (2025.01)
CPC H01L 24/05 (2013.01) [H01L 24/03 (2013.01); H10F 39/024 (2025.01); H10F 39/805 (2025.01); H10F 39/811 (2025.01); H01L 2224/05011 (2013.01); H01L 2224/05576 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a pad including a concave portion on a surface, wherein the pad is for a solder connection;
a diffusion layer at the concave portion, wherein the diffusion layer comprises a first metal;
a melting layer adjacent to the diffusion layer, wherein
the melting layer comprises a second metal, and
the melting layer diffuses and melts into a solder upon the solder connection; and
a diffusion prevention layer between the pad and the diffusion layer, wherein
the diffusion prevention layer comprises a third metal,
the diffusion prevention layer prevents diffusion of the pad into the solder upon the solder connection, and
the diffusion layer remains on a surface of the diffusion prevention layer upon the solder connection.