US 12,334,448 B2
Front end of line interconnect structures and associated systems and methods
Kyle K. Kirby, Eagle, ID (US); and Kunal R. Parekh, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 29, 2023, as Appl. No. 18/400,745.
Application 18/400,745 is a continuation of application No. 17/325,069, filed on May 19, 2021, granted, now 11,862,569.
Claims priority of provisional application 63/071,969, filed on Aug. 28, 2020.
Prior Publication US 2024/0136295 A1, Apr. 25, 2024
Int. Cl. H01L 23/538 (2006.01); H01L 21/50 (2006.01); H01L 21/768 (2006.01); H10D 84/85 (2025.01); H10D 88/00 (2025.01)
CPC H01L 23/5384 (2013.01) [H01L 21/50 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5386 (2013.01); H10D 84/85 (2025.01); H10D 88/00 (2025.01)] 17 Claims
OG exemplary drawing
 
1. A method for forming an electrical connection on the backside of a semiconductor device, the method comprising:
forming, during front-end-of-line processing of the semiconductor device—
a dielectric material on a semiconductor substrate material, the dielectric material having a backside on a front side of the substrate material and a front side opposite the backside;
a conducting material on at least a portion of the front side of the dielectric material, the conducting material having a line portion and an interconnect structure electrically coupled to the line portion, the interconnect structure being separated from the front side of the substrate material by the dielectric material, and the interconnect structure having a backside facing the front side of the substrate material and a front side opposite the backside; and
an active contact surface on the backside of the interconnect structure; and
exposing the active contact surface for electrical connection access by removing at least a portion of the substrate material and a portion of the dielectric material adjacent to the active contact surface.