US 12,334,438 B2
Semiconductor device
Minsung Kang, Yongin-si (KR); Hyoungyol Mun, Yongin-si (KR); Sungdong Cho, Hwaseong-si (KR); and Wonhee Cho, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on May 12, 2022, as Appl. No. 17/742,619.
Claims priority of application No. 10-2021-0094202 (KR), filed on Jul. 19, 2021.
Prior Publication US 2023/0019790 A1, Jan. 19, 2023
Int. Cl. H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01)
CPC H01L 23/528 (2013.01) [H01L 21/7682 (2013.01); H01L 23/5329 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor substrate including a first region and a second region;
first metal lines spaced apart from each other at a first interval on the first region;
second metal lines spaced apart from each other at a second interval on the second region, the second interval being smaller than the first interval; and
a passivation layer on the semiconductor substrate and covering the first and second metal lines, the passivation layer including:
sidewall parts that cover sidewalls of the first metal lines and the second metal lines, the sidewall parts including a porous dielectric material,
upper parts that cover top surfaces of the first metal lines and the second metal lines, and
an air gap defined by the sidewall parts between the second metal lines,
wherein a density of pores in the sidewall parts is greater than a density of pores in the upper parts.