US 12,334,414 B2
Power semiconductor device with dual heat dissipation structures
Jayaganasan Narayanasamy, Melaka-Durian Tunggal (MY); Angel Enverga, Melaka (MY); Chii Shang Hong, Melaka (MY); Chee Ming Lam, Melaka (MY); Sanjay Kumar Murugan, Melaka (MY); and Subaramaniym Senivasan, Bemban (MY)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Jan. 8, 2024, as Appl. No. 18/406,832.
Application 18/406,832 is a continuation of application No. 17/524,879, filed on Nov. 12, 2021, granted, now 11,908,771.
Prior Publication US 2024/0145340 A1, May 2, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/433 (2006.01); H01L 23/00 (2006.01); H01L 23/495 (2006.01); H01L 23/498 (2006.01)
CPC H01L 23/4334 (2013.01) [H01L 23/49551 (2013.01); H01L 23/49555 (2013.01); H01L 23/49568 (2013.01); H01L 23/49811 (2013.01); H01L 24/84 (2013.01); H01L 23/49513 (2013.01); H01L 24/32 (2013.01); H01L 24/40 (2013.01); H01L 24/73 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/40175 (2013.01); H01L 2224/73263 (2013.01)] 24 Claims
OG exemplary drawing
 
1. A molded semiconductor package, comprising:
a semiconductor die;
a substrate attached to a first side of the semiconductor die;
a plurality of leads electrically connected to a second side of the semiconductor die opposite the first side;
a heat sink clip thermally coupled to a pad at the second side of the semiconductor die; and
a molding compound encapsulating the semiconductor die, part of the leads, part of the heat sink clip, and at least part of the substrate,
wherein the molding compound has a first main side, a second main side opposite the first main side and at which the substrate is disposed, and an edge extending between the first main side and the second main side,
wherein the leads protrude from opposing first and second faces of the edge of the molding compound,
wherein the heat sink clip protrudes from opposing third and fourth faces of the edge of the molding compound.